perf: RISC-V: store available counter mask as bitmap
Published Sep 25, 2026
No CVSS score
EPSS 0.20%
Description
The available-counter mask was a single unsigned long, but iteration uses RISCV_MAX_COUNTERS, which is 64. On RV32 that reads past the object. Filling with an unsigned-long bit at index 32 and above is also wrong.
Use DECLARE_BITMAP and set_bit/bitmap helpers. Walk each bitmap word into CFG_MATCH when checking events, when allocating an index, and when stopping all counters. Set the counter base to i times BITS_PER_LONG. Share the CFG_MATCH ecall through a small helper so the 32-bit argument split is not duplicated. On qemu-system-riscv32 the probe bitmap has bits above XLEN set, so the first word alone is not enough.
[pjw@kernel.org: updated to apply; fixed checkpatch.pl issues]
Affected products
-
Affected
- ≥ , <
- ≥ , <
- ≥ , <
- ≥ , <
-
Affected
- 5.18
Unaffected
- ≥ 0, < 5.18
- ≥ 6.12.111, ≤ 6.12.*
- ≥ 6.18.53, ≤ 6.18.*
- ≥ 7.2.7, ≤ 7.2.*
- 7.3-rc3
Default status is the baseline for the product. Each version can override it (patched versions can be marked unaffected).
No data.
No data.
No Red Hat product state for this CVE.
No package ranges for this CVE.
Remediation
No remediation recorded yet.
No CWE recorded.
References (5)
- https://euvd.enisa.europa.eu/vulnerability/EUVD-2026-86895 Advisory
- https://git.kernel.org/stable/c/143668c424772979a45118dc9cc9c2c13a35f41d
- https://git.kernel.org/stable/c/6809da6e9c08ccc9a09cb0a48c61471679274aaa
- https://git.kernel.org/stable/c/9bec7beaed074bcae4181fde9ff9dfbe4e7b0957
- https://git.kernel.org/stable/c/e5481db31f4654e9a1254d5d467d9b1ff2f8b1cb
Change history (0)
No recorded changes yet.
CVE.org / MITRE
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Red Hat
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GitHub
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