riscv-boom SonicBOOM L1 Data Cache timing discrepancy
Published Aug 9, 2025
2.0
LOWCVSS 4.0
EPSS 0.16%
Description
A vulnerability has been found in riscv-boom SonicBOOM up to 2.2.3 and classified as problematic. Affected by this vulnerability is an unknown functionality of the component L1 Data Cache Handler. The manipulation leads to observable timing discrepancy. Local access is required to approach this attack. The complexity of an attack is rather high. The exploitation appears to be difficult. The vendor was contacted early about this disclosure but did not respond in any way.
Affected products
-
Affected
- 2.2.0
- 2.2.1
- 2.2.2
- 2.2.3
Default status is the baseline for the product. Each version can override it (patched versions can be marked unaffected).
| Vendor | Product | Default status | Versions |
|---|---|---|---|
| Riscv-Boom | SonicBOOM | unknown | Affected
|
- ≤ 2.2.3
No data.
No Red Hat product state for this CVE.
No package ranges for this CVE.
Remediation
No remediation recorded yet.
References (5)
- https://euvd.enisa.europa.eu/vulnerability/EUVD-2025-24063 Advisory
- https://github.com/fizz-is-on-the-way/vuls_cpu/tree/master/MSHRush exploitrelatedBroken Link
- https://vuldb.com/?ctiid.319297 signaturepermissions-requiredPermissions RequiredVDB Entry
- https://vuldb.com/?id.319297 vdb-entryThird Party AdvisoryVDB Entry
- https://vuldb.com/?submit.625550 third-party-advisoryThird Party AdvisoryVDB Entry
| Link | Providers | Tags |
|---|---|---|
| https://euvd.enisa.europa.eu/vulnerability/EUVD-2025-24063 | Advisory | |
| https://github.com/fizz-is-on-the-way/vuls_cpu/tree/master/MSHRush | exploitrelatedBroken Link | |
| https://vuldb.com/?ctiid.319297 | signaturepermissions-requiredPermissions RequiredVDB Entry | |
| https://vuldb.com/?id.319297 | vdb-entryThird Party AdvisoryVDB Entry | |
| https://vuldb.com/?submit.625550 | third-party-advisoryThird Party AdvisoryVDB Entry |
Change history (0)
No recorded changes yet.
CVE.org / MITRE
CISA Vulnrichment
Red Hat
No data
GitHub
No data